MC908GZ60CFUE Datasheet, PDF (128/352 Pages) Freescale Semiconductor, Inc – Standard features, Features of the CPU08

Low-Power Modes
10.15 Exiting Wait Mode
These events restart the CPU clock and load the program counter with the reset vector or with an interrupt
vector:
• External reset — A low on the RST pin resets the MCU and loads the program counter with the
contents of locations $FFFE and $FFFF.
• External interrupt — A high-to-low transition on an external interrupt pin (IRQ pin) loads the
program counter with the contents of locations: $FFFA and $FFFB; IRQ pin.
• Break interrupt — In emulation mode, a break interrupt loads the program counter with the contents
of $FFFC and $FFFD.
• Computer operating properly (COP) module reset — A timeout of the COP counter resets the MCU
and loads the program counter with the contents of $FFFE and $FFFF.
• Low-voltage inhibit (LVI) module reset — A power supply voltage below the V_TRIPF voltage resets
the MCU and loads the program counter with the contents of locations $FFFE and $FFFF.
• Clock generator module (CGM) interrupt — A CPU interrupt request from the CGM loads the
program counter with the contents of $FFF8 and $FFF9.
• Keyboard interrupt (KBI) module — A CPU interrupt request from the KBI module loads the
program counter with the contents of $FFE0 and $FFE1.
• Timer 1 interface (TIM1) module interrupt — A CPU interrupt request from the TIM1 loads the
program counter with the contents of:
– $FFF2 and $FFF3; TIM1 overflow
– $FFF4 and $FFF5; TIM1 channel 1
– $FFF6 and $FFF7; TIM1 channel 0
• Timer 2 interface module (TIM2) interrupt — A CPU interrupt request from the TIM2 loads the
program counter with the contents of:
– $FFEC and $FFED; TIM2 overflow
– $FFEE and $FFEF; TIM2 channel 1
– $FFF0 and $FFF1; TIM2 channel 0
– $FFCC and $FFCD; TIM2 channel 5
– $FFCE and $FFCF; TIM2 channel 4
– $FFD0 and $FFD1; TIM2 channel 3
– $FFD2 and $FFD3; TIM2 channel 2
• Serial peripheral interface (SPI) module interrupt — A CPU interrupt request from the SPI loads
the program counter with the contents of:
– $FFE8 and $FFE9; SPI transmitter
– $FFEA and $FFEB; SPI receiver
• Serial communications interface (SCI) module interrupt — A CPU interrupt request from the SCI
loads the program counter with the contents of:
– $FFE2 and $FFE3; SCI transmitter
– $FFE4 and $FFE5; SCI receiver
– $FFE6 and $FFE7; SCI receiver error
• Analog-to-digital converter (ADC) module interrupt — A CPU interrupt request from the ADC loads
the program counter with the contents of: $FFDE and $FFDF; ADC conversion complete.
• Timebase module (TBM) interrupt — A CPU interrupt request from the TBM loads the program
counter with the contents of: $FFDC and $FFDD; TBM interrupt.
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
128
Freescale Semiconductor