MC908GZ60CFUE Datasheet, PDF (263/352 Pages) Freescale Semiconductor, Inc – Standard features, Features of the CPU08

Chapter 18
Timer Interface Module (TIM1)
18.1 Introduction
This section describes the timer interface module (TIM1). TIM1 is a two-channel timer that provides a
timing reference with input capture, output compare, and pulse-width-modulation functions. Figure 18-2
is a block diagram of the TIM1.
18.2 Features
Features of the TIM1 include the following:
• Two input capture/output compare channels
– Rising-edge, falling-edge, or any-edge input capture trigger
– Set, clear, or toggle output compare action
• Buffered and unbuffered pulse width modulation (PWM) signal generation
• Programmable TIM1 clock input with 7-frequency internal bus clock prescaler selection
• Free-running or modulo up-count operation
• Toggle any channel pin on overflow
• TIM1 counter stop and reset bits
18.3 Functional Description
Figure 18-2 shows the structure of the TIM1. The central component of the TIM1 is the 16-bit TIM1
counter that can operate as a free-running counter or a modulo up-counter. The TIM1 counter provides
the timing reference for the input capture and output compare functions. The TIM1 counter modulo
registers, T1MODH:T1MODL, control the modulo value of the TIM1 counter. Software can read the TIM1
counter value at any time without affecting the counting sequence.
The two TIM1 channels are programmable independently as input capture or output compare channels.
18.3.1 TIM1 Counter Prescaler
The TIM1 clock source is one of the seven prescaler outputs. The prescaler generates seven clock rates
from the internal bus clock. The prescaler select bits, PS[2:0], in the TIM1 status and control register
(T1SC) select the TIM1 clock source.
18.3.2 Input Capture
With the input capture function, the TIM1 can capture the time at which an external event occurs. When
an active edge occurs on the pin of an input capture channel, the TIM1 latches the contents of the TIM1
counter into the TIM1 channel registers, T1CHxH:T1CHxL. The polarity of the active edge is
programmable. Input captures can generate TIM1 central processor unit (CPU) interrupt requests.
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Freescale Semiconductor
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