MC908GZ60CFUE Datasheet, PDF (265/352 Pages) Freescale Semiconductor, Inc – Standard features, Features of the CPU08

Functional Description
INTERNAL
BUS CLOCK
TSTOP
TRST
PRESCALER
16-BIT COUNTER
16-BIT COMPARATOR
T1MODH:T1MODL
PRESCALER SELECT
PS2
PS1
PS0
CHANNEL 0
16-BIT COMPARATOR
T1CH0H:T1CH0L
16-BIT LATCH
CHANNEL 1
16-BIT COMPARATOR
T1CH1H:T1CH1L
16-BIT LATCH
ELS0B ELS0A
CH0F
MS0A
MS0B
ELS1B ELS1A
MS1A
CH1F
TOF
INTERRUPT
TOIE
LOGIC
TOV0
CH0MAX
CH0IE
TOV1
CH1MAX
CH1IE
PORT
LOGIC
PTD4/T1CH0
INTERRUPT
LOGIC
PORT
LOGIC
PTD5/T1CH1
INTERRUPT
LOGIC
Figure 18-2. TIM1 Block Diagram
18.3.3 Output Compare
With the output compare function, the TIM1 can generate a periodic pulse with a programmable polarity,
duration, and frequency. When the counter reaches the value in the registers of an output compare
channel, the TIM1 can set, clear, or toggle the channel pin. Output compares can generate TIM1 CPU
interrupt requests.
18.3.3.1 Unbuffered Output Compare
Any output compare channel can generate unbuffered output compare pulses as described in 18.3.3
Output Compare. The pulses are unbuffered because changing the output compare value requires writing
the new value over the old value currently in the TIM1 channel registers.
An unsynchronized write to the TIM1 channel registers to change an output compare value could cause
incorrect operation for up to two counter overflow periods. For example, writing a new value before the
counter reaches the old value but after the counter reaches the new value prevents any compare during
that counter overflow period. Also, using a TIM1 overflow interrupt routine to write a new, smaller output
compare value may cause the compare to be missed. The TIM1 may pass the new value before it is
written.
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Freescale Semiconductor
265