MC908GZ60CFUE Datasheet, PDF (199/352 Pages) Freescale Semiconductor, Inc – Standard features, Features of the CPU08

Functional Description
If start bit verification is not successful, the RT clock is reset and a new search for a start bit begins.
To determine the value of a data bit and to detect noise, recovery logic takes samples at RT8, RT9, and
RT10. Table 14-3 summarizes the results of the data bit samples.
Table 14-3. Data Bit Recovery
RT8, RT9, and RT10 Samples
000
001
010
011
100
101
110
111
Data Bit Determination
0
0
0
1
0
1
1
1
Noise Flag
0
1
1
1
1
1
1
0
NOTE
The RT8, RT9, and RT10 samples do not affect start bit verification. If any
or all of the RT8, RT9, and RT10 start bit samples are 1s following a
successful start bit verification, the noise flag (NF) is set and the receiver
assumes that the bit is a start bit.
To verify a stop bit and to detect noise, recovery logic takes samples at RT8, RT9, and RT10. Table 14-4
summarizes the results of the stop bit samples.
Table 14-4. Stop Bit Recovery
RT8, RT9, and RT10 Samples
000
001
010
011
100
101
110
111
Framing Error Flag
1
1
1
0
1
0
0
0
Noise Flag
0
1
1
1
1
1
1
0
14.4.3.4 Framing Errors
If the data recovery logic does not detect a 1 where the stop bit should be in an incoming character, it sets
the framing error bit, FE, in SCS1. A break character also sets the FE bit because a break character has
no stop bit. The FE bit is set at the same time that the SCRF bit is set.
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Freescale Semiconductor
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