MC908GZ60CFUE Datasheet, PDF (223/352 Pages) Freescale Semiconductor, Inc – Standard features, Features of the CPU08

Introduction
7
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Read:
SBSW
Break Status Register
R
R
R
R
R
R
R
$FE00
(BSR) Write:
Note⁽¹⁾
See page 237. _Reset:
0
0
0
0
0
0
0
0
1. Writing a 0 clears SBSW.
SIM Reset Status Register ^{Read: POR}
PIN
COP
ILOP
ILAD MODRST LVI
0
$FE01
(SRSR) Write:
See page 237. _POR:
1
0
0
0
0
0
0
0
Break Flag Control Register ^Read: _BCFE
R
R
R
R
R
R
R
$FE03
(BFCR) Write:
See page 238. _Reset:
0
Interrupt Status Register 1 ^{Read: IF6}
IF5
IF4
IF3
IF2
IF1
0
0
$FE04
(INT1) Write: R
R
R
R
R
R
R
R
See page 231. _Reset:
0
0
0
0
0
0
0
0
Interrupt Status Register 2 ^{Read: IF14}
IF13
IF12
IF11
IF10
IF9
IF8
IF7
$FE05
(INT2) Write: R
R
R
R
R
R
R
R
See page 233. _Reset:
0
0
0
0
0
0
0
0
Interrupt Status Register 3 ^{Read: IF22}
IF32
IF20
IF19
IF18
IF17
IF16
IF15
$FE06
(INT3) Write: R
R
R
R
R
R
R
R
See page 233. _Reset:
0
0
0
0
0
0
0
0
Interrupt Status Register 4 ^Read:
0
0
0
0
0
0
IF24
IF23
$FE07
(INT4) Write: R
R
R
R
R
R
R
R
See page 233. _Reset:
0
0
0
0
0
0
0
0
= Unimplemented
R = Reserved
Figure 15-2. SIM I/O Register Summary
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Freescale Semiconductor
223