MC908GZ60CFUE Datasheet, PDF (54/352 Pages) Freescale Semiconductor, Inc – Standard features, Features of the CPU08

Memory
2.7.2.2 FLASH-2 Block Protect Register
The FLASH-2 block protect register (FL2BPR) is implemented as a byte within the FLASH-1 memory;
therefore, can only be written during a FLASH-1 programming sequence. The value in this register
determines the starting location of the protected range within the FLASH-2 memory.
Address:
Read:
Write:
Reset:
$FF81
Bit 7
6
5
4
3
2
1
BPR7
BPR6
BPR5
BPR4
BPR3
BPR2
BPR1
Unaffected by reset
Figure 2-8. FLASH-2 Block Protect Register (FL2BPR)
Bit 0
BPR0
NOTE
The FLASH-2 block protect register (FL2BPR) controls the block protection
for the FLASH-2 array. However, FL2BPR is implemented within the
FLASH-1 memory array and therefore, the FLASH-1 control register
(FL1CR) must be used to program/erase FL2BPR.
FL2BPR[7:0] — Block Protect Register Bits 7 to 0
These eight bits represent bits [14:7] of a 16-bit memory address. Bit 15 is a 0 and bits [6:0] are 0s.
The resultant 16-bit address is used for specifying the start address of the FLASH-2 memory for block
protection. FLASH-2 is protected from this start address to the end of FLASH-2 memory at $7FFF.
With this mechanism, the protect start address can be $XX00 and $XX80 (128 byte page boundaries)
within the FLASH-2 array.
START ADDRESS OF FLASH
BLOCK PROTECT
0
16-BIT MEMORY ADDRESS
FLBPR VALUE
0000000
Figure 2-9. FLASH-2 Block Protect Start Address
Table 2-3. FLASH-2 Protected Ranges
FL2BPR[7:0]
Protected Range
$FF
No Protection
$FE
$7F00–$7FFF
$FD
$7E80–$7FFF
↓
↓
$0B
$0580–$7FFF
$0A
$0500–$7FFF
$09
$0480–$7FFF
$08
$0462–$7FFF
↓
↓
$04
$0462–$7FFF
$03
$0462–$7FFF
$02
$0462–$7FFF
$01
$0462–$7FFF
$00
$0462–$7FFF
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
54
Freescale Semiconductor