MC908GZ60CFUE Datasheet, PDF (141/352 Pages) Freescale Semiconductor, Inc – Standard features, Features of the CPU08

Identifier Acceptance Filter
2. Two identifier acceptance filters, each to be applied to:
a. The 14 most significant bits of the extended identifier plus the SRR and the IDE bits of
CAN2.0B messages, or
b. The 11 bits of the identifier plus the RTR and IDE bits of CAN 2.0A/B messages.
Figure 12-5 shows how the 32-bit filter bank (CIDAR0–CIDAR3 and CIDMR0–CIDMR3) produces
filter 0 and 1 hits.
3. Four identifier acceptance filters, each to be applied to the first eight bits of the identifier. This mode
implements four independent filters for the first eight bits of a CAN 2.0A/B compliant standard
identifier. Figure 12-6 shows how the 32-bit filter bank (CIDAR0–CIDAR3 and CIDMR0–CIDMR3)
produces filter 0 to 3 hits.
4. Closed filter. No CAN message will be copied into the foreground buffer RxFG, and the RXF flag
will never be set.
ID28 IDR0 ID21 ID20 IDR1 ID15 ID14 IDR2
ID7 ID6
IDR3 RTR
ID10 IDR0
ID3 ID2
IDR1 IDE ID10 IDR2
ID3 ID10 IDR3
ID3
AM7 CIDMR0 AM0 AM7 CIDMR1 AM0 AM7 CIDMR2 AM0 AM7 CIDMR3 AM0
AC7 CIDAR0 AC0 AC7 CIDAR1 AC0 AC7 CIDAR2 AC0 AC7 CIDAR3 AC0
ID Accepted (Filter 0 Hit)
Figure 12-4. Single 32-Bit Maskable Identifier Acceptance Filter
ID28 IDR0 ID21 ID20 IDR1 ID15 ID14 IDR2
ID10 IDR0
ID3 ID2
IDR1 IDE ID10 IDR2
ID7 ID6
IDR3 RTR
ID3 ID10 IDR3
ID3
AM7 CIDMR0 AM0 AM7 CIDMR1 AM0
AC7 CIDAR0 AC0 AC7 CIDAR1 AC0
ID ACCEPTED (FILTER 0 HIT)
AM7 CIDMR2 AM0 AM7 CIDMR3 AM0
AC7 CIDAR2 AC0 AC7 CIDAR3 AC0
ID ACCEPTED (FILTER 1 HIT)
Figure 12-5. Dual 16-Bit Maskable Acceptance Filters
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Freescale Semiconductor
141