MC908JB16DWE Datasheet, PDF (52/332 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory Map
Addr.
Register Name
Bit 7
6
$0050
Read:
R
R
Reserved Write:
Reset:
$0051
PLL Bandwidth Control ^Read:
Register Write:
R
(PBWC) _Reset:
LOCK1
0
$0052
Read:
VCO Control Register
(PVCR)
Write:
Reset:
VCO_7
0
VCO_6
0
PLL1 N & R Divider Select
$0053
Register High
Read:
Write: ^VDS1_11
VDS1_10
(PNRH1) _{Reset: 0}
0
$0054
PLL1 N Divider Select ^Read: _{VDS1_7}
Register Low Write:
(PNSL1) _{Reset: 0}
VDS1_6
1
$0055
PLL1 R Divider Select ^Read: _{RDS1_7}
Register Low Write:
(PRSL1) _{Reset: 1}
RDS1_6
0
PLL2 N & R Divider Select
$0056
Register High
Read:
Write:
VDS2_11
VDS2_10
(PNRH2) _{Reset: 0}
0
$0057
PLL2 N Divider Select ^Read: _{VDS2_7}
Register Low Write:
(PNSL1) _{Reset: 0}
VDS2_6
1
$0058
PLL2 R Divider Select
Register Low
Read:
Write:
RDS2_7
(PRSL2) _{Reset: 1}
RDS2_6
0
$0059
Phase Detector Control ^Read:
Register Write:
(PDCR) _Reset:
PHD_7
1
PHD_6
0
5
R
R
VCO_5
1
VDS1_9
1
VDS1_5
1
RDS1_5
0
VDS2_9
1
VDS2_5
1
RDS2_5
0
PHD_5
0
4
R
PLLON1
0
VCO_4
1
VDS1_8
0
VDS1_4
1
RDS1_4
1
VDS2_8
0
VDS2_4
1
RDS2_4
1
PHD_4
1
3
R
R
VCO_3
0
0
0
VDS1_3
1
RDS1_3
0
0
0
VDS2_3
1
RDS2_3
0
PHD_3
0
2
R
LOCK2
0
VCO_2
0
0
0
VDS1_2
1
RDS1_2
0
0
0
VDS2_2
1
RDS2_2
0
PHD_2
0
1
R
R
VCO_1
0
RDS1_9
0
VDS1_1
0
RDS1_1
0
RDS2_9
0
VDS2_1
0
RDS2_1
0
PHD_1
0
Bit 0
R
PLLON2
0
VCO_0
0
RDS1_8
0
VDS1_0
1
RDS1_0
0
RDS2_8
0
VDS2_0
1
RDS2_0
0
PHD_0
0
U = Unaffected
X = Indeterminate
= Unimplemented
R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 9 of 12)
Technical Data
52
Memory Map
MC68HC908JB16 — Rev. 1.1
Freescale Semiconductor