MC908JB16DWE Datasheet, PDF (47/332 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory Map
Addr.
Register Name
Bit 7
6
5
IRQ Status and Control ^{Read: 0}
0
0
$001E
Register Write:
(INTSCR) _{Reset: 0}
0
0
$001F
Read:
Configuration Register
(CONFIG)^†
Write:
Reset:
LVIDR
0*
LVI5OR3 URSTD
0*
0*
† One-time writable register after each reset.
* LVIDR, LVI5OR3, URSTD, and LVID, are reset by POR or LVI reset only.
$0020
USB Endpoint 0 Data ^{Read: UE0R07}
Register 0 Write: UE0T07
(UE0D0) _Reset:
UE0R06
UE0T06
UE0R05
UE0T05
$0021
USB Endpoint 0 Data ^{Read: UE0R17}
Register 1 Write: UE0T17
(UE0D1) _Reset:
UE0R16
UE0T16
UE0R15
UE0T15
$0022
USB Endpoint 0 Data ^{Read: UE0R27}
Register 2 Write: UE0T27
(UE0D2) _Reset:
UE0R26
UE0T26
UE0R25
UE0T25
$0023
USB Endpoint 0 Data ^{Read: UE0R37}
Register 3 Write: UE0T37
(UE0D3) _Reset:
UE0R36
UE0T36
UE0R35
UE0T35
$0024
USB Endpoint 0 Data ^{Read: UE0R47}
Register 4 Write: UE0T47
(UE0D4) _Reset:
UE0R46
UE0T46
UE0R45
UE0T45
$0025
USB Endpoint 0 Data ^{Read: UE0R57}
Register 5 Write: UE0T57
(UE0D5) _Reset:
UE0R56
UE0T56
UE0R55
UE0T55
$0026
USB Endpoint 0 Data ^{Read: UE0R67}
Register 6 Write: UE0T67
(UE0D6) _Reset:
UE0R66
UE0T66
UE0R65
UE0T65
$0027
USB Endpoint 0 Data ^{Read: UE0R77}
Register 7 Write: UE0T77
(UE0D7) _Reset:
UE0R76
UE0T76
UE0R75
UE0T75
4
3
0
IRQF
0
0
LVID SSREC
0*
0
UE0R04 UE0R03
UE0T04 UE0T03
Unaffected by reset
UE0R14 UE0R13
UE0T14 UE0T13
Unaffected by reset
UE0R24 UE0R23
UE0T24 UE0T23
Unaffected by reset
UE0R34 UE0R33
UE0T34 UE0T33
Unaffected by reset
UE0R44 UE0R43
UE0T44 UE0T43
Unaffected by reset
UE0R54 UE0R53
UE0T54 UE0T53
Unaffected by reset
UE0R64 UE0R63
UE0T64 UE0T63
Unaffected by reset
UE0R74 UE0R73
UE0T74 UE0T73
Unaffected by reset
2
0
ACK
0
COPRS
0
UE0R02
UE0T02
UE0R12
UE0T12
UE0R22
UE0T22
UE0R32
UE0T32
UE0R42
UE0T42
UE0R52
UE0T52
UE0R62
UE0T62
UE0R72
UE0T72
1
IMASK
0
STOP
0
UE0R01
UE0T01
UE0R11
UE0T11
UE0R21
UE0T21
UE0R31
UE0T31
UE0R41
UE0T41
UE0R51
UE0T51
UE0R61
UE0T61
UE0R71
UE0T71
Bit 0
MODE
0
COPD
0
UE0R00
UE0T00
UE0R10
UE0T10
UE0R20
UE0T20
UE0R30
UE0T30
UE0R40
UE0T40
UE0R50
UE0T50
UE0R60
UE0T60
UE0R70
UE0T70
U = Unaffected
X = Indeterminate
= Unimplemented
R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 12)
MC68HC908JB16 — Rev. 1.1
Freescale Semiconductor
Memory Map
Technical Data
47