MC908JB16DWE Datasheet, PDF (302/332 Pages) Freescale Semiconductor, Inc – Microcontrollers

Computer Operating Properly (COP)
17.8.1 Wait Mode
The COP remains active during wait mode. To prevent a COP reset
during wait mode, periodically clear the COP counter in a CPU interrupt
routine.
17.8.2 Stop Mode
Stop mode turns off the OSCDCLK input to the COP and clears the COP
prescaler. Service the COP immediately before entering or after exiting
stop mode to ensure a full COP timeout period after entering or exiting
stop mode.
To prevent inadvertently turning off the COP with a STOP instruction, a
configuration option is available that disables the STOP instruction.
When the STOP bit in the configuration register has the STOP
instruction is disabled, execution of a STOP instruction results in an
illegal opcode reset.
17.9 COP Module During Break Mode
The COP is disabled during a break interrupt when V_TST is present on
the RST pin.
Technical Data
302
Computer Operating Properly (COP)
MC68HC908JB16 — Rev. 1.1
Freescale Semiconductor