MC908JB16DWE Datasheet, PDF (253/332 Pages) Freescale Semiconductor, Inc – Microcontrollers

Clock Generator Module (CGM)
13.4.4 External Filter Capacitor Pins (CGMXFC1, CGMXFC2)
The CGMXFC1 and CGMXFC2 pins are required by the loop filter to
filter out phase corrections for each PLL. An external filter network is
connected to each pin. (See 13.5 CGMXFC External Connections.)
13.4.5 CGM Clock Output Pins (CGMOUT1, CGMOUT2)
CGMOUT1 and CGMOUT2 are VCO output signals. The output signals
are buffered through logic stages to output pins without degrading the
loop performance.
13.5 CGMXFC External Connections
The external filter network is critical to the stability and reaction time of
the PLL. The configurations shown in Figure 13-4 (a) and (b) are
recommended for connection to CGMXFC1 and CGMXFC2.
CGMXFC1
CGMXFC2
56 kΩ
2n2 F
150 pF
56 kΩ
2n2 F
150 pF
V_SSA0
(a)
V_SSA1
(b)
Figure 13-4. CGMXFC External Connections
MC68HC908JB16 — Rev. 1.1
Freescale Semiconductor
Clock Generator Module (CGM)
Technical Data
253