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MC908JB16DWE Datasheet, PDF (250/332 Pages) Freescale Semiconductor, Inc – Microcontrollers
Clock Generator Module (CGM)
VDDA CGMXFC VSSA
VREGA
OSCXCLK
REFERENCE
DIVIDER
CGMRCLK
R
RDS[9:0]
PHASE
DETECTOR
PHD_[7:0]
LOCK
DETECTOR
LOCK
LOOP
FILTER
VOLTAGE
CONTROLLED
OSCILLATOR
PLL ANALOG
PLLON VCO_[7:0]
CGMOUT
CGMFCLK
VCO
DIVIDER
N
VDS[11:0]
Figure 13-2. CGM Block Diagram
CGMVCLK
13.3.1 Reference Frequency Source (OSCXCLK)
The OSCXCLK signal is a buffered output of the crystal oscillator circuit
and runs at a rate equal to the crystal frequency. OSCXCLK is used as
the reference frequency source for both CGM modules.
13.3.2 Voltage Controlled Oscillator
The VCO clock frequency (CGMVCLK) is generated internally and it is
proportional to the controlled voltage setting by the phase detector
output. The VCO operating range is programmable for a wide range of
frequencies and for maximum immunity to external noise. The
CGMVCLK signal is also the CGM output signal, CGMOUT.
Technical Data
250
Clock Generator Module (CGM)
MC68HC908JB16 — Rev. 1.1
Freescale Semiconductor