MC908JB16DWE Datasheet, PDF (268/332 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output (I/O) Ports
When bit DDRAx is a logic 1, reading address $0000 reads the PTAx
data latch. When bit DDRAx is a logic 0, reading address $0000 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 14-2 summarizes
the operation of the port A pins.
Table 14-2. Port A Pin Functions
DDRA
Bit
PTA Bit
I/O Pin Mode
Accesses
to DDRA
Read/Write
0
X⁽¹⁾
Input, Hi-Z^{(2) DDRA[7:0]}
1
X
Output
DDRA[7:0]
Notes:
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect input.
Accesses to PTA
Read
Pin
PTA[7:0]
Write
PTA[7:0]⁽³⁾
PTA[7:0]
Technical Data
268
Input/Output (I/O) Ports
MC68HC908JB16 — Rev. 1.1
Freescale Semiconductor