MC908JB16DWE Datasheet, PDF (129/332 Pages) Freescale Semiconductor, Inc – Microcontrollers

Monitor ROM (MON)
9.4.2 Data Format
9.4.3 Break Signal
Communication with the monitor ROM is in standard non-return-to-zero
(NRZ) mark/space data format. Transmit and receive baud rates must
be identical.
NEXT
START
BIT
BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
START
STOP BIT
BIT
Figure 9-3. Monitor Data Format
A start bit (logic 0) followed by nine logic 0 bits is a break signal. When
the monitor receives a break signal, it drives the PTA0 pin high for the
duration of two bits and then echoes back the break signal.
MISSING STOP BIT
TWO-STOP-BIT DELAY BEFORE ZERO ECHO
9.4.4 Baud Rate
01234567
01234567
Figure 9-4. Break Transaction
The communication baud rate is dependant on oscillator frequency,
f_XCLK. The state of PTA3 also affects baud rate if entry to monitor mode
is by IRQ = V_TST. When PTA3 is high, the divide by ratio is 625. If the
PTA3 pin is at logic zero upon entry into monitor mode, the divide by ratio
is 312.
Table 9-3. Monitor Baud Rate Selection
Monitor Mode
Entry By:
IRQ = V_TST
Blank reset vector,
IRQ = V_DD
Oscillator Clock
Frequency,
f_CLK
12 MHz
12 MHz
12 MHz
PTA3
0
1
X
Baud Rate
38400 bps
19200 bps
19200 bps
MC68HC908JB16 — Rev. 1.1
Freescale Semiconductor
Monitor ROM (MON)
Technical Data
129