DS162 Datasheet, PDF (9/73 Pages) Xilinx, Inc – Advance Product Specification

Spartan-6 FPGA Data Sheet: DC and Switching Characteristics
In Table 9 and Table 10, values for V_IL and V_IH are recommended input voltages. Values for I_OL and I_OH are guaranteed over
the recommended operating conditions at the V_OL and V_OH test points. Only selected standards are tested. These are
chosen to ensure that all standards meet their specifications. The selected standards are tested at a minimum V_CCO with the
respective V_OL and V_OH voltage levels shown. Other standards are sample tested.
Table 9: Single-Ended I/O Standard DC Input and Output Levels
I/O Standard
V, Min
V_IL
V, Max
V_IH
V, Min
V, Max
V_OL
V, Max
V_OH
V, Min
I_OL
I_OH
mA
mA
LVTTL
–0.5
0.8
2.0
4.1
0.4
2.4
Note(2) Note(2)
LVCMOS33
–0.5
LVCMOS25
–0.5
LVCMOS18
–0.5
LVCMOS18 (-1L)
–0.5
LVCMOS18_JEDEC –0.5
LVCMOS15
–0.5
LVCMOS15 (-1L)
–0.5
LVCMOS15_JEDEC –0.5
LVCMOS12
–0.5
LVCMOS12 (-1L)
–0.5
LVCMOS12_JEDEC –0.5
PCI33_3
–0.5
PCI66_3
–0.5
I2C
–0.5
SMBUS
–0.5
0.8
0.7
0.38
0.33
35% V_CCO
0.38
0.33
35% V_CCO
0.38
0.33
35% V_CCO
30% V_CCO
30% V_CCO
25% V_CCO
0.8
2.0
1.7
0.8
0.71
65% V_CCO
0.8
0.71
65% V_CCO
0.8
0.71
65% V_CCO
50% V_CCO
50% V_CCO
70% V_CCO
2.1
4.1
4.1
4.1
4.1
4.1
4.1
4.1
4.1
4.1
4.1
4.1
V_CCO + 0.5
V_CCO + 0.5
4.1
4.1
0.4
0.4
0.45
0.45
0.45
25% V_CCO
25% V_CCO
25% V_CCO
0.4
0.4
0.4
10% V_CCO
10% V_CCO
20% V_CCO
0.4
V_CCO – 0.4
V_CCO – 0.4
V_CCO – 0.45
V_CCO – 0.45
V_CCO – 0.45
75% V_CCO
75% V_CCO
75% V_CCO
V_CCO – 0.4
V_CCO – 0.4
V_CCO – 0.4
90% V_CCO
90% V_CCO
–
–
Note(2)
Note(2)
Note(2)
Note(2)
Note(2)
Note(3)
Note(3)
Note(3)
Note(4)
Note(4)
Note(4)
1.5
1.5
3
4
Note(2)
Note(2)
Note(2)
Note(2)
Note(2)
Note(3)
Note(3)
Note(3)
Note(4)
Note(4)
Note(4)
–0.5
–0.5
–
–
SDIO
MOBILE_DDR
HSTL_I
HSTL_II
HSTL_III
HSTL_I_18
HSTL_II_18
HSTL_III_18
SSTL3_I
SSTL3_II
SSTL2_I
SSTL2_II
SSTL18_I
SSTL18_II
SSTL15_II
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
12.5% V_CCO
20% V_CCO
V_REF – 0.1
V_REF – 0.1
V_REF – 0.1
V_REF – 0.1
V_REF – 0.1
V_REF – 0.1
V_REF – 0.2
V_REF – 0.2
V_REF – 0.15
V_REF – 0.15
V_REF – 0.125
V_REF – 0.125
V_REF – 0.1
75% V_CCO
80% V_CCO
V_REF + 0.1
V_REF + 0.1
V_REF + 0.1
V_REF + 0.1
V_REF + 0.1
V_REF + 0.1
V_REF + 0.2
V_REF + 0.2
V_REF + 0.15
V_REF + 0.15
V_REF + 0.125
V_REF + 0.125
V_REF + 0.1
4.1
12.5% V_CCO 75% V_CCO
0.1
–0.1
4.1
10% V_CCO 90% V_CCO
0.1
–0.1
4.1
0.4
V_CCO – 0.4
8
–8
4.1
0.4
V_CCO – 0.4
16
–16
4.1
0.4
V_CCO – 0.4
24
–8
4.1
0.4
V_CCO – 0.4
11
–11
4.1
0.4
V_CCO – 0.4
22
–22
4.1
0.4
V_CCO – 0.4
30
–11
4.1
V_TT – 0.6
V_TT + 0.6
8
–8
4.1
V_TT – 0.8
V_TT + 0.8
16
–16
4.1
V_TT – 0.61 V_TT + 0.61
8.1
–8.1
4.1
V_TT – 0.81 V_TT + 0.81
16.2 –16.2
4.1
V_TT – 0.47 V_TT + 0.47
6.7
–6.7
4.1
V_TT – 0.60 V_TT + 0.60
13.4 –13.4
4.1
V_TT – 0.4
V_TT + 0.4
13.4 –13.4
Notes:
1. Tested according to relevant specifications.
2. Using drive strengths of 2, 4, 6, 8, 12, 16, or 24 mA.
3. Using drive strengths of 2, 4, 6, 8, 12, or 16 mA.
4. Using drive strengths of 2, 4, 6, 8, or 12 mA.
5. For more information, refer to the Spartan-6 FPGA SelectIO Resources User Guide.
DS162 (v1.9) August 23, 2010
www.xilinx.com
Advance Product Specification
9