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DS162 Datasheet, PDF (3/73 Pages) Xilinx, Inc – Advance Product Specification
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Spartan-6 FPGA Data Sheet: DC and Switching Characteristics
Table 2: Recommended Operating Conditions(1) (Cont’d)
Symbol
Description
Memory
Temperature Speed
Range
Grade
Controller
Block(2)
Min Typ Max Units
Performance
Maximum current through pin using PCI Commercial -4, -3, -2,
N/A
I/O standard when forward biasing the
-1L(7)
IIN(8)
clamp diode.
Industrial -3, -2,
N/A
-1L(7)
–
–
10 mA
–
–
10 mA
Battery voltage relative to GND, Tj = 0°C Commercial -4, -3, -2,
N/A
to +85°C
-1L
(XC6SLX75, XC6SLX75T, XC6SLX100,
XC6SLX100T, XC6SLX150, and
VBATT(9)
XC6SLX150T only)
Battery voltage relative to GND,
Industrial -3, -2, -1L
N/A
Tj = –40°C to +100°C (XC6SLX75,
XC6SLX75T, XC6SLX100,
XC6SLX100T, XC6SLX150, and
XC6SLX150T only)
1.0
–
3.6
V
Notes:
1. All voltages are relative to ground.
2. See Interface Performances for Memory Interfaces in Table 25. The standard VCCINT voltage range applies to designs not using an MCB, or to devices
that do not support MCB functionality including the LX4 device, the TQG144 and CPG196 packages, and the -3N speed grade.
3. Recommended maximum voltage droop for VCCAUX is 10 mV/ms.
4. Configuration data is retained even if VCCO drops to 0V.
5. Includes VCCO of 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V.
6. For PCI systems, the transmitter and receiver should have common supplies for VCCO.
7. Devices with a -1L speed grade do not support Xilinx PCI IP.
8. Do not exceed a total of 100 mA per bank.
9. VBATT is required to maintain the battery backed RAM (BBR) AES key when VCCAUX is not applied. Once VCCAUX is applied, VBATT can be
unconnected. When BBR is not used, Xilinx recommends connecting to VCCAUX or GND. However, VBATT can be unconnected.
Table 3: eFUSE Programming Conditions(1)
Symbol
Description
VFS(2) External voltage supply
IFS VFS supply current
VCCAUX Auxiliary supply voltage relative to GND
RFUSE(3) External resistor from RFUSE pin to GND
VCCINT Internal supply voltage relative to GND
tj
Temperature range
Min Typ Max Units
3.2 3.3 3.4 V
–
– 40 mA
3.2 3.3 3.45 V
1129 1140 1151 Ω
1.14 1.2 1.26 V
15
–
85 °C
Notes:
1. These specifications apply during programming of the eFUSE AES key. Programming is only supported through JTAG.The AES key is only supported
in the following devices: XC6SLX75, XC6SLX75T, XC6SLX100, XC6SLX100T, XC6SLX150, and XC6SLX150T.
2. When programming eFUSE, VFS must be less than or equal to VCCAUX. When not programming or when eFUSE is not used, Xilinx recommends
connecting VFS to GND. However, VFS can be between GND and 3.45 V.
3. An RFUSE resistor is required when programming the eFUSE AES key. When not programming or when eFUSE is not used, Xilinx recommends
connecting the RFUSE pin to VCCAUX or GND. However, RFUSE can be unconnected.
DS162 (v1.9) August 23, 2010
www.xilinx.com
Advance Product Specification
3
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