DS162 Datasheet, PDF (35/73 Pages) Xilinx, Inc – Advance Product Specification

Spartan-6 FPGA Data Sheet: DC and Switching Characteristics
Table 33: SSO Limit per V_CCO/GND Pair (Cont’d)
V_CCO
I/O Standard
Various
LVDS_33
LVDS_25
BLVDS_25
MINI_LVDS_33
MINI_LVDS_25
RSDS_33
RSDS_25
TMDS_33
PPDS_33
PPDS_25
DISPLAY_PORT
I2C
SMBUS
Drive
Slew
SSO Limit per V_CCO/GND Pair
All TQG144, CPG196,
CSG225, FT(G)256, and
LX devices in CSG324
All CSG484, FG(G)484,
FG(G)676, FG(G)900, and
LXT devices in CSG324
Bank 0/2
Bank 1/3
Bank 0/2 Bank 1/3/4/5
16
N/A
16
N/A
20
N/A
20
N/A
20
48
20
20
13
N/A
13
N/A
18
N/A
18
N/A
12
N/A
12
N/A
15
N/A
15
N/A
83
N/A
83
N/A
12
N/A
12
N/A
16
N/A
16
N/A
42
40
42
30
47
55
47
42
44
52
44
40
Notes:
1. SSO limits greater than the number of I/O per V_CCO/GND pair (Table 32) indicate No Limit for the given I/O standard. They are provided in
this table to calculate limits when using multiple I/O standards in a bank.
2. Not available (N/A) indicates that the I/O standard is not available in the given bank.
3. When used with the MCB, these signals are exempt from SSO analysis due to the known activity of the MCB switching patterns. SSO
performance is validated for all MCB instances. MCB outputs can, in some cases, exceed the SSO limits.
DS162 (v1.9) August 23, 2010
www.xilinx.com
Advance Product Specification
35