DS162 Datasheet, PDF (13/73 Pages) Xilinx, Inc – Advance Product Specification

X-Ref Target - Figure 2
+V
Spartan-6 FPGA Data Sheet: DC and Switching Characteristics
0
Differential
Voltage
–V
P–N
Figure 2: Differential Peak-to-Peak Voltage
ds162_02_112009
Table 17 summarizes the DC specifications of the clock input of the GTP transceiver. Consult the Spartan-6 FPGA GTP
Transceivers User Guide for further details.
Table 17: GTP Transceiver Clock DC Input Level Specification
Symbol
DC Parameter
V_IDIFF
R_IN
C_EXT
Differential peak-to-peak input voltage
Differential input resistance
Required external AC coupling capacitor
GTP Transceiver Switching Characteristics
Min
Typ
Max Units
200
800 2000 mV
80
100
120
Ω
–
100
–
nF
Consult the Spartan-6 FPGA GTP Transceivers User Guide for further information.
Table 18: GTP Transceiver Performance
Symbol
Description
F_GTPMAX
F_GTPRANGE1
F_GTPRANGE2
F_GTPRANGE3
F_GPLLMAX
F_GPLLMIN
Maximum GTP transceiver data rate
GTP transceiver data rate range when
PLL_TXDIVSEL_OUT = 1
GTP transceiver data rate range when
PLL_TXDIVSEL_OUT = 2
GTP transceiver data rate range when
PLL_TXDIVSEL_OUT = 4
Maximum PLL frequency
Minimum PLL frequency
Speed Grade
Units
-4
-3
-2
-1L
3.2
3.2
2.7
N/A
Gb/s
1.88 to 3.2 1.88 to 3.2 1.88 to 2.7
N/A
Gb/s
0.94 to 1.62 0.94 to 1.62 0.94 to 1.62
N/A
Gb/s
0.6 to 0.81 0.6 to 0.81 0.6 to 0.81
N/A
Gb/s
1.62
1.62
1.62
N/A
GHz
0.94
0.94
0.94
N/A
GHz
Table 19: GTP Transceiver Dynamic Reconfiguration Port (DRP) Switching Characteristics
Symbol
Description
Speed Grade
-4
-3
-2
F_GTPDRPCLK GTP transceiver DCLK (DRP clock) maximum frequency
160
125
100
Units
-1L
N/A MHz
DS162 (v1.9) August 23, 2010
www.xilinx.com
Advance Product Specification
13