XQ2V1000 Datasheet, PDF (75/127 Pages) Xilinx, Inc – QPro Virtex-II 1.5V Military QML Platform FPGAs

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QPro Virtex-II 1.5V Military QML Platform FPGAs
QPro Virtex-II Device/Package Combinations and Maximum I/Os Available
This section provides QPro Virtex-II Device/Package
Combinations and Maximum I/Os Available and QPro
Virtex-II Pin Definitions, followed by pinout tables for the
following packages:
• FG456 Fine-Pitch BGA Package
• BG575 Standard BGA Package
• BG728 Standard BGA and CG717 Ceramic CGA
Packages
• CF1144 Ceramic Flip-Chip Fine-Pitch CGA Package
QPro Virtex-II devices are available in both wire-bond and
flip-chip packages. The basic package dimensions are
listed in Table 72. See Figure 52 through Figure 56 for a
more complete mechanical description of each available
package. Table 73 shows the maximum number of user I/Os
possible for each available package. There are four pack-
age type definitions:
• FG denotes plastic wire-bond fine-pitch BGA (1.00 mm
pitch).
• BG denotes plastic wire-bond ball grid array (1.27 mm
pitch).
• CG denotes hermetic ceramic wire-bond column grid
array (1.27 mm pitch).
• CF denotes non-hermetic ceramic flip-chip column grid
array (1.00 mm pitch).
The number of I/Os per package include all user I/Os except
the 15 control pins (CCLK, DONE, M0, M1, M2, PROG_B,
PWRDWN_B, TCK, TDI, TDO, TMS, HSWAP_EN, DXN,
DXP, AND RSVD).
Table 72: Package Information
Package
FG456
Pitch (mm)
1.00
Size (mm)
23 x 23
BG575
1.27
31 x 31
BG728 & CG717
1.27
35 x 35
CF1144
1.00
35 x 35
Table 73: QPro Virtex-II Device/Package Combinations and Maximum Number of Available I/Os (Advance
Information)
Available I/Os
Package
XQ2V1000
XQ2V3000
XQ2V6000
FG456
324
-
-
BG575
328
-
-
BG728
-
516
-
CG717
-
516
-
CF1144
-
-
824
Notes:
1. The BG728 and CG717 packages are pinout (footprint) compatible.
QPro Virtex-II Pin Definitions
This section describes the pinouts for QPro Virtex-II devices
in the following packages:
• FG456: wire-bond fine-pitch BGA of 1.00 mm pitch
• BG575 and BG728: wire-bond BGA of 1.27 mm pitch
• CG717: wire-bond ceramic column grid of 1.27 mm
pitch
• CF1144: Ceramic flip-chip fine-pitch column grid of
1.00 mm pitch
Each device is split into eight I/O banks to allow for flexibility
in the choice of I/O standards (see the QPro Virtex-II Data
Sheet). Global pins, including JTAG, configuration, and
power/ground pins, are listed at the end of each table.
Table 74 provides definitions for all pin types.
All QPro Virtex-II pinout tables are available on the distribu-
tion CD-ROM, or on the web (at http://www.xilinx.com).
DS122 (v1.1) January 7, 2004
www.xilinx.com
75
Product Specification
1-800-255-7778