XQ2V1000 Datasheet, PDF (54/127 Pages) Xilinx, Inc – QPro Virtex-II 1.5V Military QML Platform FPGAs

QPro Virtex-II 1.5V Military QML Platform FPGAs
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Table 43: IOB Input Switching Characteristics Standard Adjustments (Continued)
Description
Symbol
Standard
Standard-specific data input delay adjustments
T_{ILVDCI_DV2_15}
T_{IGTL_DCI}
T_{IGTLP_DCI}
T_{IHSTL_I_DCI}
T_{IHSTL_II_DCI}
T_{IHSTL_III_DCI}
T_{IHSTL_IV_DCI}
T_{IHSTL_I_DCI_18}
T_{IHSTL_II_DCI_18}
T_{IHSTL_III_DCI_18}
T_{IHSTL_IV_DCI_18}
T_{ISSTL2_I_DCI}
T_{ISSTL2_II_DCI}
T_{ISSTL3_I_DCI}
T_{ISSTL3_II_DCI}
T_{ILDT_25}
T_{IULVDS_25}
Notes:
1. Input timing for LVTTL is measured at 1.4 V. For other I/O standards, see Table 46.
LVDCI_DV2_15
GTL_DCI
GTLP_DCI
HSTL_I_DCI
HSTL_II_DCI
HSTL_III_DCI
HSTL_IV_DCI
HSTL_I_DCI_18
HSTL_II_DCI_18
HSTL_III_DCI_18
HSTL_IV_DCI_18
SSTL2_I_DCI
SSTL2_II_DCI
SSTL3_I_DCI
SSTL3_II_DCI
LDT_25
ULVDS_25
Value
1.14
0.48
0.48
0.48
0.48
0.48
0.48
0.48
0.48
0.48
0.48
0.48
0.48
0.40
0.40
0.56
0.56
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
54
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