XQ2V1000 Datasheet, PDF (52/127 Pages) Xilinx, Inc – QPro Virtex-II 1.5V Military QML Platform FPGAs

QPro Virtex-II 1.5V Military QML Platform FPGAs
R
IOB Input Switching Characteristics
Input delays associated with the pad are specified for
LVTTL levels. For other standards, adjust the delays with
the values shown in IOB Input Switching Characteristics
Standard Adjustments, page 53.
Table 42: IOB Input Switching Characteristics
Description
Symbol
Device
Propagation Delays
Pad to I output, no delay
Pad to I output, with delay
T_IOPI
T_IOPID
All
XQ2V1000
XQ2V3000
XQ2V6000
Propagation Delays
Pad to output IQ via transparent latch, no delay
Pad to output IQ via transparent latch, with delay
T_IOPLI
T_IOPLID
All
XQ2V1000
XQ2V3000
XQ2V6000
Clock CLK to output IQ
T_IOCKIQ
All
Setup and Hold Times with Respect to Clock at IOB Input Register
Pad, no delay
Pad, with delay
T_IOPICK/T_IOICKP
T_IOPICKD/T_IOICK
PD
All
XQ2V1000
XQ2V3000
XQ2V6000
ICE input
SR input (IFF, synchronous)
Set/Reset Delays
T_IOICECK/T_IOCKI
All
CE
T_IOSRCKI
All
SR input to IQ (asynchronous)
T_IOSRIQ
All
GSR to output IQ
T_GSRQ
All
Notes:
1. Input timing for LVTTL is measured at 1.4 V. For other I/O standards, see Table 46.
Min
-
-
-
-
-
-
-
-
-
1.06/–0.45
4.10/–2.58
4.22/–2.66
4.56/–2.90
0.24/ 0.04
0.34
Max
0.88
2.43
2.49
2.66
1.05
4.09
4.20
4.55
0.77
-
-
-
-
-
-
1.40
6.88
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
52
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DS122 (v1.1) January 7, 2004
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