English
Language : 

TI380C27 Datasheet, PDF (60/77 Pages) Texas Instruments – DUAL-PROTOCOL COMMPROCESSOR
TI380C27
DUAL-PROTOCOL COMMPROCESSOR
SPWS014A – APRIL 1994 – REVISED MARCH 1995
SCS, SRSX,
SRS0, SRS1
SIACK
Valid
267
SRNW
SUDS,
SLDS
SDDIR
SDBEN
272
High
282R
268
273a
273
283R
286
279
276
275
SDTACK
282a
Hi-Z
255
Hi-Z
(see Note A)
261
259
260
261a
SADH0 – SADH7,
SADL0 – SADL7,
Hi-Z
Output Data Valid
Hi-Z
SPH, SPL
NOTE A: SDTACK is an active-low bus ready signal. It must be asserted before data output.
Figure 30. 68xxx DIO Read-Cycle Timing
60
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443