TI380C27 Datasheet, PDF (44/77 Pages) Texas Instruments – DUAL-PROTOCOL COMMPROCESSOR

TI380C27
DUAL-PROTOCOL COMMPROCESSOR
SPWS014A – APRIL 1994 – REVISED MARCH 1995
ethernet timing of XMIT signals: COLL
NO.
Delay time from TXC high of the last transmitted data bit ( TXEN is high) to COLL
340 HBWIN _{sampled high, so not to generate a heart-beat error}
341 COLPUL Minimum pulse duration of COLL high for assured sample
342 COLSET Setup of COLL high to TXC high
MIN
20 ns + 1 cycle
20
MAX UNIT
47 cycles
ns
ns
TXC
COLL
TXD
340
341
342
TXEN
Figure 19. Ethernet Timing of XMIT Signals: COLL
ethernet timing of XMIT signals: JAM
NO.
MIN
MAX UNIT
350
JAMTIM
Time from COLL sampled high (TXC high) to first transmitted JAM bit on TXD
(see Note 23)
4 cycles
351 COLSET Setup time, COLL high before TXC high
20
ns
352 COLPUL Pulse duration, COLL high for assured sample, minimum
20 ns + 1 cycle
ns
NOTE 23: The JAM pattern is delayed until after the completion of the preamble pattern. The TI380C27 transmits a JAM pattern of all 1s.
350
TXC
TXD
COLL
Data
Data
Data
JAM JAM
JAM
351
352
Figure 20. Ethernet Timing of XMIT Signals: JAM
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