TI380C27 Datasheet, PDF (52/77 Pages) Texas Instruments – DUAL-PROTOCOL COMMPROCESSOR

SIF Inputs:
SBCLK
User Master
(T4)
SBBSY,
SHLDA
SIF Outputs:
230
SHRQ
Bus Exchange
I1
I2
208a
208b
SIF Master
TX
T1
241
SRD, SWR
SBHE
241a
212
SADH0 – SADH7,
SADL0 – SADL7,
SPH, SPL
224c
SDDIR
SOWN
(see Note A)
224a
NOTE A: While the system-interface DMA controls are active (i.e., SOWN is asserted), SCS is disabled.
Figure 25. 80x8x-Mode Bus-Arbitration Timing, SIF Takes Control
212
Address Valid
Write
Read