TI380C27 Datasheet, PDF (46/77 Pages) Texas Instruments – DUAL-PROTOCOL COMMPROCESSOR

TI380C27
DUAL-PROTOCOL COMMPROCESSOR
SPWS014A – APRIL 1994 – REVISED MARCH 1995
SCS, SRSX,
SRS0 – SRS2,
Valid
Valid (see Note A)
SBHE
264
265
268
SRAS
256
266a
267
SIACK
272a
273a
SWR
SRD
SDDIR
High
SDBEN
272a
272a
282R
283R
273a
273a
286
279
282a
275
SRDY
Hi-Z
(see Note B)
255
Hi-Z
260
261
SADH0 – SADH7,
259
SADL0 – SADL7,
Hi-Z
SPH, SPL
(see Note C)
261a
Output Data Valid
Hi-Z
NOTES: A. In 80x8x mode, SRAS can be used to strobe the values of SBHE, SRSX, SRS0 – SRS2, and SCS. When used to do so, SRAS
must meet parameter 266a, and SBHE, SRS0 – SRS2, and SCS must meet parameter 264. If SRAS is strapped high, parameters
266a and 264 are irrelevant and parameter 268 must be met.
B. When the TI380C27 begins to drive SDBEN inactive, it has already latched the write data internally. Parameter 263 must be met
to the input of the data buffers.
C. In 8-bit 80x8x mode DIO reads, the SADH0 – SADH7 contain don’t care data.
Figure 21. 80x8x DIO Read-Cycle Timing
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