TI380C27 Datasheet, PDF (48/77 Pages) Texas Instruments – DUAL-PROTOCOL COMMPROCESSOR

TI380C27
DUAL-PROTOCOL COMMPROCESSOR
SPWS014A – APRIL 1994 – REVISED MARCH 1995
SCS, SRSX,
SRS0 – SRS2,
SBHE
Valid
264
265
268
SRAS
256
SIACK
SWR
SRD
SDDIR
266a
267
272a
272a
272a
280
273a
273a
286
273a
282W
283W
SDBEN
(see Note A)
SRDY
276
282b
279
275
Hi-Z
255
Hi-Z
SADH0 – SADH7,
SADL0 – SADL7,
SPH, SPL
(see Note B)
263
262
Hi-Z
Data
Hi-Z
NOTES: A. When the TI380C27 begins to drive SDBEN inactive, it has already latched the write data internally. Parameter 263 must be met
to the input of the data buffers.
B. In 8-bit 80x8x-mode DIO writes, the value placed on SADH0 – SADH7 is a don’t care.
Figure 22. 80x8x DIO Write-Cycle Timing
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