TI380C27 Datasheet, PDF (26/77 Pages) Texas Instruments – DUAL-PROTOCOL COMMPROCESSOR

TI380C27
DUAL-PROTOCOL COMMPROCESSOR
SPWS014A – APRIL 1994 – REVISED MARCH 1995
SIFACL control for pseudo-DMA operation
Pseudo DMA is software controlled by the use of five bits in the SIFACL register. The logic model for the SIFACL
register control of pseudo-DMA operation is shown in Figure 2.
Internal
Signals
SYSTEM_INTERRUPT
(SIFSTS register)
DMA
Request
DMA
Grant
DMADIR
Motorola Mode
Host
Interface
M
U
SINTR/SIRQ
X
M
U
SHRQ/SBRQ
X
M
SHLDA/SBGR
U
X
. . . _SWHLDA
SWDDIR SWHRQ ^{. . .} PSDMAEN SINTEN ^{. . .}
SIFACL Register
Figure 2. Pseudo-DMA Logic Related to SIFACL Bits
SDDIR
26
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