LAN9303 Datasheet, PDF (25/366 Pages) SMSC Corporation – Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
Note 3.2
The pin names for the twisted pair pins apply to a normal connection. If HP Auto-MDIX is
enabled and a reverse connection is detected or manually selected, the RX and TX pins
will be swapped internally.
NUM
PINS
NAME
1
Bias Reference
+3.3V Port 1
2
Analog Power
Supply
+3.3V Port 2
2
Analog Power
Supply
+3.3V Master
1
Bias Power
Supply
Port 2
Transmitter
1
+1.8V Power
Supply
Table 3.3 LAN Port 1 & 2 Power and Common Pins
SYMBOL
EXRES
VDD33A1
BUFFER
TYPE
DESCRIPTION
AI
Used for internal bias circuits. Connect to an
external 12.4K ohm, 1% resistor to ground.
P
See Note 3.3.
VDD33A2
P
See Note 3.3.
VDD33BIAS
P
See Note 3.3.
VDD18TX2
P
This pin is supplied from the internal PHY voltage
regulator. This pin must be tied to the VDD18TX1
pin for proper operation.
See Note 3.3.
Port 1
1
Transmitter
+1.8V Power
Supply
VDD18TX1
P
This pin must be connected directly to the
VDD18TX2 pin for proper operation.
See Note 3.3.
Note 3.3 Please refer to the LAN9303/LAN9303i Reference Schematic and LANCheck Schematic
Checklist on the SMSC website for additional connection information.
NUM
PINS
NAME
1
Port 0 MII Input
Data 3
Table 3.4 Port 0 MII/RMII Pins
SYMBOL
P0_IND3
BUFFER
TYPE
DESCRIPTION
IS
(PD)
IS
(PD)
-
MII MAC Mode: This pin is the receive data 3 bit
from the external PHY to the switch.
MII PHY Mode: This pin is the transmit data 3 bit
from the external MAC to the switch. The pull-down
and input buffer are disabled when the Isolate
(VPHY_ISO) bit is set in the Virtual PHY Basic
Control Register (VPHY_BASIC_CTRL).
RMII PHY Mode: This pin is not used.
SMSC LAN9303/LAN9303i
25
DATASHEET
Revision 1.3 (08-27-09)