LAN9303 Datasheet, PDF (143/366 Pages) SMSC Corporation – Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
13.2.1.3 Interrupt Enable Register (INT_EN)
Offset:
05Ch
Size:
32 bits
This register contains the interrupt enables for the IRQ output pin. Writing 1 to any of the bits enables
the corresponding interrupt as a source for IRQ. Bits in the Interrupt Status Register (INT_STS) register
will still reflect the status of the interrupt source regardless of whether the source is enabled as an
interrupt in this register (with the exception of Software Interrupt Enable (SW_INT_EN)). For
descriptions of each interrupt, refer to the Interrupt Status Register (INT_STS) bits, which mimic the
layout of this register.
BITS
31
30
29
28
27
26
25:20
19
18:13
12
11:0
DESCRIPTION
Software Interrupt Enable (SW_INT_EN)
Device Ready Enable (READY_EN)
RESERVED
Switch Fabric Interrupt Event Enable (SWITCH_INT_EN)
Port 2 PHY Interrupt Event Enable (PHY_INT2_EN)
Port 1 PHY Interrupt Event Enable (PHY_INT1_EN)
RESERVED
GP Timer Interrupt Enable (GPT_INT_EN)
RESERVED
GPIO Interrupt Event Enable (GPIO_EN)
RESERVED
TYPE
R/W
R/W
RO
R/W
R/W
R/W
RO
R/W
RO
R/W
RO
DEFAULT
0b
0b
-
0b
0b
0b
-
0b
-
0b
-
SMSC LAN9303/LAN9303i
143
DATASHEET
Revision 1.3 (08-27-09)