LAN9303 Datasheet, PDF (215/366 Pages) SMSC Corporation – Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
Table 13.14 Indirectly Accessible Switch Control and Status Registers (continued)
REGISTER #
0812h
0813h
0814h
0815h
0816h
0817h
0818h
0819h
081Ah
081Bh
081Ch
081Dh
081Eh
081Fh
0820h
0821h
0822h
0823h
0824h-083Fh
0840h
0841h
0842h-0850h
0851h
0852h
SYMBOL
REGISTER NAME
MAC_RX_65_TO_127_CNT_1 Port 1 MAC Receive 65 to 127 Byte Count Register,
Section 13.4.2.5
MAC_RX_128_TO_255_CNT_1 Port 1 MAC Receive 128 to 255 Byte Count Register,
Section 13.4.2.6
MAC_RX_256_TO_511_CNT_1 Port 1 MAC Receive 256 to 511 Byte Count Register,
Section 13.4.2.7
MAC_RX_512_TO_1023_CNT_1 Port 1 MAC Receive 512 to 1023 Byte Count Register,
Section 13.4.2.8
MAC_RX_1024_TO_MAX_CNT_1
Port 1 MAC Receive 1024 to Max Byte Count Register,
Section 13.4.2.9
MAC_RX_OVRSZE_CNT_1 Port 1 MAC Receive Oversize Count Register,
Section 13.4.2.10
MAC_RX_PKTOK_CNT_1 Port 1 MAC Receive OK Count Register, Section 13.4.2.11
MAC_RX_CRCERR_CNT_1 Port 1 MAC Receive CRC Error Count Register,
Section 13.4.2.12
MAC_RX_MULCST_CNT_1 Port 1 MAC Receive Multicast Count Register,
Section 13.4.2.13
MAC_RX_BRDCST_CNT_1 Port 1 MAC Receive Broadcast Count Register,
Section 13.4.2.14
MAC_RX_PAUSE_CNT_1
Port 1 MAC Receive Pause Frame Count Register,
Section 13.4.2.15
MAC_RX_FRAG_CNT_1
Port 1 MAC Receive Fragment Error Count Register,
Section 13.4.2.16
MAC_RX_JABB_CNT_1
Port 1 MAC Receive Jabber Error Count Register,
Section 13.4.2.17
MAC_RX_ALIGN_CNT_1
Port 1 MAC Receive Alignment Error Count Register,
Section 13.4.2.18
MAC_RX_PKTLEN_CNT_1
MAC_RX_GOODPKTLEN_CNT_1
Port 1 MAC Receive Packet Length Count Register,
Section 13.4.2.19
Port 1 MAC Receive Good Packet Length Count Register,
Section 13.4.2.20
MAC_RX_SYMBL_CNT_1 Port 1 MAC Receive Symbol Error Count Register,
Section 13.4.2.21
MAC_RX_CTLFRM_CNT_1 Port 1 MAC Receive Control Frame Count Register,
Section 13.4.2.22
RESERVED
Reserved for Future Use
MAC_TX_CFG_1
Port 1 MAC Transmit Configuration Register, Section 13.4.2.23
MAC_TX_FC_SETTINGS_1 Port 1 MAC Transmit Flow Control Settings Register,
Section 13.4.2.24
RESERVED
Reserved for Future Use
MAC_TX_DEFER_CNT_1
Port 1 MAC Transmit Deferred Count Register,
Section 13.4.2.25
MAC_TX_PAUSE_CNT_1 Port 1 MAC Transmit Pause Count Register, Section 13.4.2.26
SMSC LAN9303/LAN9303i
215
DATASHEET
Revision 1.3 (08-27-09)