LAN9303 Datasheet, PDF (144/366 Pages) SMSC Corporation – Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII

13.2.2
13.2.2.1
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
GPIO/LED
This section details the General Purpose I/O (GPIO) and LED related System CSR’s.
General Purpose I/O Configuration Register (GPIO_CFG)
Offset:
1E0h
Size:
32 bits
This read/write register configures the GPIO input and output pins. The polarity of the GPIO pins is
configured here.
BITS
DESCRIPTION
31:22
21:16
15:6
5:0
RESERVED
GPIO Interrupt Polarity 5-0 (GPIO_INT_POL[5:0])
These bits set the interrupt polarity of the GPIO pins. The configured level
(high/low) will set the corresponding GPIO_INT bit in the General Purpose
I/O Interrupt Status and Enable Register (GPIO_INT_STS_EN).
0: Sets low logic level trigger on corresponding GPIO pin
1: Sets high logic level trigger on corresponding GPIO pin
RESERVED
GPIO Buffer Type 5-0 (GPIOBUF[5:0])
This field sets the buffer types of the GPIO pins.
0: Corresponding GPIO pin configured as an open-drain driver
1: Corresponding GPIO pin configured as a push/pull driver
As an open-drain driver, the output pin is driven low when the corresponding
data register is cleared, and is not driven when the corresponding data
register is set.
TYPE
RO
R/W
RO
R/W
DEFAULT
-
0h
-
0h
Revision 1.3 (08-27-09)
144
DATASHEET
SMSC LAN9303/LAN9303i