LAN9303 Datasheet, PDF (21/366 Pages) SMSC Corporation – Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
internal Port 1&2 PHY registers or to all non-PHY registers (using addresses 16-31 and a non-standard
extended address map). MIIM and SMI use the same pins and protocol and differ only in that SMI
provides access to all internal registers while MIIM provides access to only the Port 1&2 PHY registers.
A special mode provides access to the Virtual PHY, which mimics the register operation of a single
port standalone PHY. This is used for software compatibility in managed operation.
The selection of management modes is determined at startup via the P0_MODE[2:0], MNGT1_LED4P,
and MNGT0_LED3P straps as detailed in Table 2.1. System configuration diagrams for each mode are
provided in Figure 2.4.
MODE
MAC SMI
MAC I²C
PHY SMI
PHY I²C
Table 2.1 Device Modes
I²C INTERFACE
(MASTER/SLAVE)
I²C master used to load
initial configuration from
EEPROM and for CPU
R/W access to
EEPROM
I²C master used to load
initial configuration from
EEPROM and for CPU
R/W access to
EEPROM
I²C slave used for
management
I²C master used to load
initial configuration from
EEPROM and for CPU
R/W access to
EEPROM
SMI/MIIM
INTERFACE
SMI/MIIM slave,
used for CPU access
to internal PHYs and
non-PHY registers
MIIM master,
used for CPU access
to external PHY
registers
SMI/MIIM slave,
used for CPU access
to internal PHYs,
Virtual PHY, and non-
PHY registers
I²C master used to load
initial configuration from
EEPROM and for CPU
R/W access to
EEPROM
I²C slave used for
management
Virtual MIIM slave,
used for external
MAC access to
Virtual PHY registers
P0_MODE[2:0]
STRAP VALUE
000
000
001,
010,
011,
100,
101,
or 110
001,
010,
011,
100,
101,
or 110
MNGT1_LED4P,
MNGT0_LED3PST
RAP VALUE
01
10
01
10
SMSC LAN9303/LAN9303i
21
DATASHEET
Revision 1.3 (08-27-09)