K524G2GACB-A050 Datasheet, PDF (77/94 Pages) Samsung semiconductor – MCP MEMORY

K524G2GACB-A050
MCP MEMORY
18. Auto Refresh & Self Refresh
18.1. Auto Refresh
An auto refresh command is issued by having CS, RAS and CAS held low with CKE and WE high at the rising edge of the clock(CK). All banks
must be precharged and idle for tRP(min) before the auto refresh command is applied. Once this cycle has been started, no control of the
external address pins are required because of the internal address counter. When the refresh cycle has completed, all banks will be in the idle
state. A delay between the auto refresh command and the next activate command or subsequent auto refresh command must be greater than
or equal to the tRFC(min).
Figure 14. Auto refresh timing
CK
CK
Command PRE
NOP
NOP
Auto
Refresh
NOP
NOP
NOP
ACT
NOP
NOP
CKE = High
tRP
tRFC(min)
DQ
DQS
High-Z
High-Z
NOTE :
1) tRP=3CLK
2) Device must be in the all banks idle state prior to entering Auto refresh mode.
18.2. Self Refresh
A Self Refresh command is defined by having CS, RAS, CAS and CKE held low with WE high at the rising edge of the clock. Once the self
Refresh command is initiated, CKE must be held low to keep the device in Self Refresh mode. After 1 clock cycle from the self refresh com-
mand, all of the external control signals including system clock(CK, CK) can be disabled except CKE. The clock is internally disabled during
Self Refresh operation to reduce power. Before returning CKE high to exit the Self Refresh mode, apply stable clock input signal with Deselect
or NOP command asserted.
CK
CK
Command NOP
Self
Refresh
CKE
tIS
DQ
DQS
Figure 15. Self refresh timing
tRFC
Stable Clock
NOP
NOP
NOP
NOP
tXSR(min)
Active
NOP
tIS
High-Z
High-Z
NOTE :
1) Device must be in the all banks idle state prior to entering Self Refresh mode.
2) The minimum time that the device must remain in Self Refresh mode si tRFC.
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Revision 1.3
November 2009