K524G2GACB-A050 Datasheet, PDF (61/94 Pages) Samsung semiconductor – MCP MEMORY

K524G2GACB-A050
MCP MEMORY
Current State
CKE
n-1
CKE
n
CS
RAS CAS
WE
Add
Action
L
H
H
X
X
X
X Exit Self-Refresh
L
H
L
H
H
H
X Exit Self-Refresh
SELF-
L
H
L
H
H
L
X ILLEGAL
REFRESHING⁸⁾ L
H
L
H
L
X
X ILLEGAL
L
H
L
L
X
X
X ILLEGAL
L
L
X
X
X
X
X NOP (Maintain Self-Refresh)
POWER
DOWN
L
H
X
X
X
X
X Exit Power Down(Idle after tPDEX)
L
L
X
X
X
X
X NOP (Maintain Power Down)
H
H
X
X
X
X
X Refer to Function Truth Table
H
L
L
L
L
H
X Enter Self-Refresh
H
L
H
X
X
X
X Enter Power Down
ALL BANKS
H
L
L
H
H
H
X Enter Power Down
IDLE⁹⁾
H
L
L
H
H
L
X ILLEGAL
H
L
L
H
L
X
X ILLEGAL
H
L
L
L
X
X
X ILLEGAL
L
X
X
X
X
X
X Refer to Current State=Power Down
(H=High Level, L=Low level, X=Don′t Care)
NOTE :
1) All entries assume that CKE was High during the preceding clock cycle and the current clock cycle.
2) ILLEGAL to bank in specified state ; function may be legal in the bank indicated by BA, depending on the state of that bank.
(ILLEGAL = Device operation and/or data integrity are not guaranteed.)
3) Must satisfy bus contention, bus turn around and write recovery requirements.
4) NOP to bank precharging or in idle sate. May precharge bank indicated by BA.
5) ILLEGAL if any bank is not idle.
6) Refer to "Read with Auto Precharge Timing Diagram" for detailed information.
7) Refer to "Write with Auto Precharge Timing Diagram" for detailed information.
8) CKE Low to High transition will re-enable CK, CK and other inputs asynchronously.
A minimum setup time must be satisfied before issuing any command other than EXIT.
9) Power-Down, Self-Refresh can be entered only from All Bank Idle state.
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Revision 1.3
November 2009