K524G2GACB-A050 Datasheet, PDF (70/94 Pages) Samsung semiconductor – MCP MEMORY

K524G2GACB-A050
MCP MEMORY
11. Write Interrupted by a Write
A Burst Write can be interrupted by a new Write command before completion of the burst, where the interval between the successive Write
commands must be at least one clock cycle(tCCD(min)). When the previous burst is interrupted, the remaining addresses are overridden by
the new address and data will be written into the device until the programmed burst length is satisfied.
Figure 7. Write interrupted by a write timing
0
1
2
3
4
5
6
7
8
CK
CK
tCCD(min)
Command
NOP
WRITE A WRITE b
NOP
NOP
NOP
NOP
NOP
NOP
DQS
Hi-Z
DQs
Hi-Z
NOTE :
1) Burst Length=4
Din A0 Din A1 Din B0 Din B1 Din B2 Din B3
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Revision 1.3
November 2009