SH7011 Datasheet, PDF (92/292 Pages) Renesas Technology Corp – CMOS single-chip microprocessors

7.3.2 Wait State Control
The number of wait states inserted into ordinary space access states can be controlled using the
WCR settings. The specified number of T_w cycles (0–3 waits) are inserted as software wait cycles
with the timing shown in figure 7.4.
T₁
T_W
T₂
CK
Address
CSn
Read
RD
Data
Write
WRx
Data
Figure 7.4 Wait Timing of Ordinary Space Access (Software Wait Only)
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