SH7011 Datasheet, PDF (28/292 Pages) Renesas Technology Corp – CMOS single-chip microprocessors

Table 2.8 Addressing Modes and Effective Addresses (cont)
Addressing
Mode
Instruction
Format
Effective Addresses Calculation
Equation
Indirect indexed @(R0, GBR) The effective address is the GBR value plus the R0. GBR + R0
GBR addressing
GBR
+
GBR + R0
R0
PC relative
addressing with
displacement
@(disp:8,
PC)
The effective address is the PC value plus an 8-bit
displacement (disp). The value of disp is zero-
extended, and is doubled for a word operation, and
quadrupled for a longword operation. For a
longword operation, the lowest two bits of the PC
value are masked.
PC
H'FFFFFFFC
disp
(zero-extended)
(for longword)
&
PC + disp × 2
+
or
PC & H'FFFFFFFC
+ disp × 4
×
Word: PC +
disp × 2
Longword:
PC &
H'FFFFFFFC
+ disp × 4
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