SH7011 Datasheet, PDF (133/292 Pages) Renesas Technology Corp – CMOS single-chip microprocessors

8.4.4 Buffer Operation
Buffer operation is a function of channel 0. TGRC and TGRD can be used as buffer registers.
Table 8.5 shows the register combinations for buffer operation.
Table 8.5 Register Combinations
Channel
0
General Register
TGR0A
TGR0B
Buffer Register
TGR0C
TGR0D
The buffer operation differs, depending on whether the TGR has been set as an input capture
register or an output compare register.
When TGR Is an Output Compare Register: When a compare-match occurs, the corresponding
channel buffer register value is transferred to the general register. Figure 8.16 shows an example.
Buffer
register
Compare match signal
General
register
Comparator
TCNT
Figure 8.16 Compare Match Buffer Operation
When TGR Is an Input Capture Register: When an input capture occurs, the timer counter
(TCNT) value is transferred to the general register (TGR), and the value that had been held up to
that time in the TGR is transferred to the buffer register (figure 8.17).
Input capture signal
Buffer
register
General
register
Figure 8.17 Input Capture Buffer Operation
TCNT
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