SH7011 Datasheet, PDF (231/292 Pages) Renesas Technology Corp – CMOS single-chip microprocessors

Start transmission
Read TDRE bit in SSR
(1)
No
TDRE = 1?
Yes
Write transmit data in TDR
and set MPBT in SSR
Clear TDRE bit to 0
All data transmitted?
Yes
Read TEND bit in SSR
No ₍₂₎
TEND = 1?
No
Yes
End transmission
Figure 12.9 Sample Flowchart for Transmitting Multiprocessor Serial Data
In transmitting serial data, the SCI operates as follows:
1. The SCI monitors the TDRE bit in the SSR. When TDRE is cleared to 0 the SCI recognizes
that the transmit data register (TDR) contains new data, and loads this data from the TDR into
the transmit shift register (TSR).
2. After loading the data from the TDR into the TSR, the SCI sets the TDRE bit to 1 and starts
transmitting. If the transmit-data-empty interrupt enable bit (TIE) in the SCR is set to 1, the
SCI requests a transmit-data-empty interrupt (TxI) at this time.
Serial transmit data is transmitted in the following order from the TxD pin:
a. Start bit: one 0 bit is output.
b. Transmit data: seven or eight bits are output, LSB first.
c. Multiprocessor bit: one multiprocessor bit (MPBT value) is output.
d. Stop bit: one or two 1 bits (stop bits) are output.
e. Marking: output of 1 bits continues until the start bit of the next transmit data.
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