SH7011 Datasheet, PDF (183/292 Pages) Renesas Technology Corp – CMOS single-chip microprocessors

Bit: 15
14
13
12
11
10
9
8
—
—
—
—
—
—
—
—
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 7
6
5
4
3
2
1
0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
10.2.3 Timer 2 Constant Register (T2COR)
The timer 2 constant register (T2COR) is a 16-bit readable/writable register that is used to set the
T2CNT compare match cycle. The values in T2COR and T2CNT are continually compared, and
when the values match the CMF flag is set in T2CSR and T2CNT is cleared to 0. If the CMIE bit
in T2CSR is set to 1, an interrupt request is sent to the interrupt controller in response to the match
signal. The interrupt request is output continuously until the CMF flag in T2CSR is cleared.
Bits 15 to 8 are reserved and are not used in the cycle setting. These bits always read 0.
T2COR is initialized to H'0000 by a power-on reset.
Bit: 15
14
13
12
11
10
9
8
—
—
—
—
—
—
—
—
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 7
6
5
4
3
2
1
0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
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