SH7011 Datasheet, PDF (176/292 Pages) Renesas Technology Corp – CMOS single-chip microprocessors

Reading T1CNT and T1CSR: These registers are read in the same way as other registers. The
read addresses are H'FFFF8610 for T1CSR and H'FFFF8611 for T1CNT. A byte transfer
instruction must be used to read these registers.
9.3 Operation
9.3.1 Interval Timer Operation
To use the interval timer function, set the TME bit to 1 in the timer 1 control/status register
(T1CSR). An interval timer interrupt (ITI) is generated each time the timer 1 counter (T1CNT)
overflows, as shown in figure 9.3. This function can be used to generate interrupts at regular
intervals.
T1CNT value
H'FF
Overflow
Overflow
Overflow
Overflow
H'00
TME = 1
ITI
ITI
ITI
ITI: Interval timer interrupt request generation
Figure 9.3 Interval Timer Operation
Time
ITI
168