SH7011 Datasheet, PDF (49/292 Pages) Renesas Technology Corp – CMOS single-chip microprocessors

3.2 Sleep Mode
3.2.1 Transition to Sleep Mode
When the SLEEP instruction is executed, the chip makes a transition from the program execution
state to sleep mode. Immediately after execution of the SLEEP instruction the CPU halts, but the
contents of its internal registers are retained. On-chip peripheral modules continue to operate.
3.2.2 Exit from Sleep Mode
Sleep mode is exited by an interrupt or a power-on reset.
Exit by Interrupt: When an interrupt is generated, sleep mode is exited and interrupt exception
processing is executed. If the priority level of the generated interrupt is not higher than the mask
level set in the CPU’s status register (SR), or if an interrupt by an on-chip peripheral module is
disabled on the module side, the interrupt request will not be accepted and sleep mode will not be
exited.
Exit by Power-On Reset: When the RES pin is driven low, the chip exits sleep mode and enters
the power-on reset state.
40