SH7011 Datasheet, PDF (111/292 Pages) Renesas Technology Corp – CMOS single-chip microprocessors

Channel 0 (TIOR0L Register):
• Bits 7–4—Reserved. These bits always read 0. The write value should always be 0.
• Bits 3–0—I/O Control C3–C0 (IOC3–IOC0): These bits set the TGR0C register function.
Bit 3: Bit 2: Bit 1: Bit 0:
IOC3 IOC2 IOC1 IOC0 Description
0
0
0
0
TGR0C
Output disabled (initial value)
1
is an
Initial
1
0
output
compare
output
is 0
1
register
Output 0 on compare-match
Output 1 on compare-match
Toggle output on compare-match
1
0
0
Output disabled
1
1
0
1
Initial
output
is 1
Output 0 on compare-match
Output 1 on compare-match
Toggle output on compare-match
1
0
0
0
TGR0C
Capture
Input capture on rising edge
1
is an
input source
Input capture on falling edge
input
is the
1
0
capture
TIOC0C pin
Input capture on both edges
1
register
1
0
0
1
1
0
1
Capture
input source
is channel 1/
count clock
Input capture
on TCNT1
count up/count down
Note: When the BFA bit of TMDR0 is set to 1 and TGR0C is being used as a buffer register, these
settings become ineffective and input capture/output compares do not occur.
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