SH7011 Datasheet, PDF (81/292 Pages) Renesas Technology Corp – CMOS single-chip microprocessors

IRQ
Instruction (instruction
replaced by interrupt
exception processing)
Overrun fetch
Interrupt service routine
start instruction
Interrupt acceptance
5 + m1 + m2 + m3
3 ^{m1 m2 1 m3 1}
4
F DE E MMEME E
F
FDE
F: Instruction fetch (instruction fetched from memory where program is stored).
D: Instruction decoding (fetched instruction is decoded).
E: Instruction execution (data operation and address calculation is performed
according to the results of decoding).
M: Memory access (data in memory is accessed).
Figure 6.5 Pipeline when an IRQ Interrupt is Accepted
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