SH7011 Datasheet, PDF (275/292 Pages) Renesas Technology Corp – CMOS single-chip microprocessors

17.3.3 Bus Timing
Table 17.6 Bus Timing (Conditions: V_CC = 3.0 to 3.6V, AV_CC = 3.0 to 5.5V, AV_CC V _CC,
V_SS = AV_SS = 0V, T_a = Ð20 to +75°C)
Item
Symbol Min
Address delay time
t _AD
CS delay time 1
t _CSD1
CS delay time 2
t _CSD2
Read strobe delay time 1
t _RSD1
Read strobe delay time 2
t _RSD2
Read data setup time
t _RDS * ⁴
Read data hold time
t _RDH
Write strobe delay time 1
t _WSD1
Write strobe delay time 2
t _WSD2
Write data delay time
t _WDD
Write data hold time
t _WDH
WAIT setup time
t _WTS
WAIT hold time
t _WTH
Read data access time
t_ACC*¹ *⁵
Access time from read strobe t_CE*¹
3*³
3*³
3*³
3*³
3*³
45
0
3*³
3*³
—
0
20
0
t_cyc× (n+2) – 75
t_cyc× (n+1.5) – 75
Write address setup time with t_AS
0
respect to WR fall
Max Unit Figure
40 ns 17.6, 7
40 ns
40 ns
40 ns
40 ns
— ns
— ns
40 ns
40 ns
50 ns
30*² ns
— ns 17.8
— ns
— ns 17.6, 7
— ns
— ns
Write address hold time with t_WR
5
respect to WR fall
— ns
Write data hold time with
t _WRH
0
respect to WR fall
— ns
Notes: n is the wait number.
1. If the access time is satisfied, then the t_RDS need not be satisfied.
2. t_WDH (max) is a reference value.
3. The delay time min values are reference values (typ).
4. t_RDS is a reference value.
5. Depending on the operating frequency of the chip, there may be no memory that can be
connected in no-wait mode. In this case, a wait should be inserted.
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