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SH7011 Datasheet, PDF (282/292 Pages) Renesas Technology Corp – CMOS single-chip microprocessors
17.3.7 A/D Converter Timing
Table 17.10 A/D Converter Timing (Conditions:VCC = 3.0 to 3.6V, AVCC = 3.0 to 5.5V, AVCC
VCC , VSS = AVSS = 0V, Ta = Ð20 to +75°C)
Item
Symbol Min Typ Max Unit Figure
A/D conversion start delay time CKS = 0 tD
CKS = 1
10
—
17
t cyc
17.12
6
—
9
Input sampling time
CKS = 0 tRXS
—
64
—
CKS = 1
—
32
—
A/D conversion time
CKS = 0 tRXH
259 —
266
CKS = 1
131 —
134
Ø
Address
Write signal
Input sampling timing
ADF
(1)
(2)
tD
tSPL
tCONV
(1) : ADCSR write cycle
(2) : ADCSR address
tD : A/D conversion start delay time
tSPL : Input sampling time
tCONV : A/D conversion time
Figure 17.12 Analog Conversion Timing
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