M16C26 Datasheet, PDF (78/239 Pages) Renesas Technology Corp – 16-BIT CMOS SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/20 SERIES

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Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
M16C/26 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(1) 8-bit transfers
16-bit transfers and the source address is even.
BCLK
Address
bus
CPU use
Source
Destination
Dummy
cycle
RD signal
WR signal
Data
bus
CPU use
Source
Destination
Dummy
cycle
(2) 16-bit transfers and the source address is odd
BCLK
Address
bus
RD signal
WR signal
Data
bus
CPU use
CPU use
Source
Source + 1 Destination
Dummy
cycle
Source
Source + 1 _Destination
Dummy
cycle
CPU use
CPU use
CPU use
CPU use
(3) One wait is inserted into the source read under the conditions in (1)
BCLK
Address
bus
CPU use
Source
Destination
Dummy
cycle
RD signal
WR signal
Data
bus
CPU use
Source
Destination
Dummy
cycle
CPU use
CPU use
(4) One wait is inserted into the source read under the conditions in (2)
BCLK
Address
bus
RD signal
CPU use
Source
Source + 1
Destination
Dummy
cycle
CPU use
WR signal
Data
bus
CPU use
Source
Source + 1
Destination
Dummy
cycle
CPU use
Note: The same timing changes occur with the respective conditions at the destination as at the source
Figure 1.11.5. Example of the transfer cycles for a source read
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