M16C26 Datasheet, PDF (41/239 Pages) Renesas Technology Corp – 16-BIT CMOS SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/20 SERIES

Udenvdeelropment
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative
Oscillation Stop Detection
and
subject to change.
SINGLE-CHIP 16-BIT
M16C/26 Group
CMOS MICROCOMPUTER
Oscillation stop detection register (Note 1)
b7 b6 b5 b4 b3 b2 b1 b0
00
Symbol
CM2
Address When reset
000C_{16 0X0000002 (Note 10)}
Bit symbol
Bit name
Function
RW
CM20
Oscillation stop, re-
oscillation detection bit
(Notes 7, 8, 9, 10)
0 : Oscillation stop, re-oscillation
detection function is disabled.
1 : Oscillation stop, re-oscillation
detection function enabled.
CM21
CPU clock switch bit
(Notes 2, 3, 6, 10)
0 : Main clock (Ring oscillator
turned off
1 : Ring oscillator clock
(Ring oscillator oscillating)
CM22
CM23
Oscillation stop, re-
oscillation detection flag
(Note 4)
0 : Main clock stop, re-oscillation
not detected
1 : Main clock stop, re-oscillation
detected
XIN monitor flag (Note 5)
0 : Main clock oscillating
1 : Main clock turned off
Reserved bit
Must always be set to "0".
Nothing is assigned. Writes must set to "0". Reads are indeterminate.
CM27
Operation select bit
(when an oscillation stop,
re-oscillation is detected)
(Note 10)
0 : Reset
1 : Oscillation stop, re-oscillation
detection interrupt
Note 1: Write to this register after setting bit PRC0, of register PRCR, to "1" (write enable).
Note 2: CM21 is set to "1" (ring oscillator clock) when the main clock is stopped, and the following conditions exist:
• CM20 is "1" (oscillation stop, re-oscillation detection function enabled).
• CM27 is "1" (oscillation stop, re-oscillation detection interrupt).
• CPU clock source is the main clock.
Note 3: If CM20 is "1", and CM23 is "1" (main clock turned off), do not set CM21 to "0".
Note 4: This bit is set to "1" by main clock stop detection and re-oscillation detection. Each oscillation stop, re-oscillation
detection interrupt must correspond to a "0" to "1" transition of CM22. Once an interrupt is received, the bit can
only be cleared via an explicit "0" write operation. Otherwise, further interrupts will be disabled. Only "0" writes can
affect the bit value. CM22 is also used as a means for distinguishing between those interrupts caused by the
oscillation stop, re-oscillation detection circuitry, and those initiated by the watchdog timer.
Note 5: Read CM23 in an oscillation stop, re-oscillation detection interrupt handling routine to determine the main
clock status.
Note 6: Effective when bit CM07, of register CM0, is "0".
Note 7: When bit PM21, of register PM2, is "1" (clock modification disabled), writing to CM20 has no effect.
Note 8: Set CM20 to "0" (disable) before entering stop mode. After exiting stop mode, set CM20 back to "1" (enable).
Note 9: Set CM20 to "0" (disable) before setting bit CM05, of register CM0.
Note 10: CM20, CM21, and CM27 do not change at oscillation stop detection reset.
Figure 1.8.6. Oscillation stop detection register
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