M16C26 Datasheet, PDF (33/239 Pages) Renesas Technology Corp – 16-BIT CMOS SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/20 SERIES

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Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative
Processor Mode
and
subject to change.
SINGLE-CHIP 16-BIT
M16C/26 Group
CMOS MICROCOMPUTER
Software wait
A software wait can be inserted by setting the wait bit (bit 7) of the processor mode register 1 (address
000516) (Note) and bits 4 to 7 of the chip select control register (address 000816).
A software wait is inserted in the internal ROM/RAM area by setting the wait bit of processor mode register
1. When set to "0", each bus cycle is executed in one BCLK cycle. When set to "1", each bus cycle is
executed in two BCLK cycles. After the microcomputer has been reset, this bit defaults to "0". When set to
"1", a wait is applied to all memory areas (two BCLK cycles). Set this bit after referring to the recommended
operating conditions (main clock input oscilliation frequecny) of the electrical characteristics.
The SFR area is always accessed in two BCLK cycles regardless of the setting of these control bits.
Table 1.7.1 shows the software wait and bus cycles.
Note: Before attempting to change the contents of the processor mode register 1, set bit 1 of the protect
register (address 000A16) to “1”.
Table 1.7.1. Software waits and bus cycles
Area
Wait bit
Bus cycle
Internal
0
ROM/RAM
1
1 BCLK cycle
2 BCLK cycles
27
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