M16C26 Datasheet, PDF (64/239 Pages) Renesas Technology Corp – 16-BIT CMOS SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/20 SERIES

Udenvdeelropment
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
Interrupts
M16C/26 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Priority level of each interrupt
INT1
Timer B2
Level 0 (initial value)
Timer B0
Timer A3
Timer A1
INT3
INT0
Timer B1
Timer A4
Timer A2
UART1 receive
UART0 receive
UART2 receive/ACK2
A-D conversion
DMA1
UART 2 bus collision detection
INT5
Timer A0
UART1 transmit
UART0 transmit
UART2 transmit/NACK2
Key input interrupt
DMA0
INT4
Processor interrupt priority level (IPL)
High
Priority of peripheral I/O interrupts
(if priority levels are same)
Low
Interrupt request level judgment output
to clock generating circuit (Fig.1.8.3)
Interrupt enable flag (I flag)
Address match
Watchdog timer
DBC
NMI
Reset
Figure 1.9.9. Maskable interrupts priorities (peripheral I/O interrupts)
Interrupt
request
accepted
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